34th International Workshop on Post-Binary ULSI Systems June 4, 2025, Montreal, Quebec, Canada

• Top
• Program
• Call for Papers
• Submission
• Registration
• Committee

The 34th International Workshop on Post-Binary ULSI Systems (ULSIWS) will be held in conjunction with the IEEE 54th Annual International Symposium on Multiple-Valued Logic (ISMVL2025) on June 4, 2025, Montreal, Quebec, Canada. You are invited to submit an original paper, survey or tutorial paper on any subject in the area of new devices for ULSI systems, high-performance circuits and design, and new LSI architecture. Proposals for special sessions concerning the above topics are also welcome. Additionally, this workshop encourages and welcomes presentations from students, providing them an opportunity to showcase their research work. We are eagerly awaiting submissions as a venue for presenting the research findings.

Updates

• Post-Binary ULSI Workshop 2025 Website opened Jan. 3, 2025

Program and Abstruct

Tentative Program

Opening(13:20-13:35)

Invited Talk(13:40-14:30) Chair: Yasushi Yuminaka(Gunma University)


No.	Title	Author
1	Development of a reconfigurable AI-chip toward a computer vision-based intelligence system.	Prof. Hiroki Nakahara CEO/CTO, Tokyo Artisan Intelligence Co., Ltd., Japan Professor, Tohoku University, Japan



• Invited Speaker

Hiroki Nakahara is the founder and CEO/CTO at Tokyo Artisan Intelligence Co., Ltd., a professor at Tohoku University, and a specific professor at the Institute of Science Tokyo. His research interests include logic synthesis, reconfigurable architecture, embedded systems, and machine learning. He received a Ph.D. in computer science from the Kyushu Institute of Technology in 2007. Prof. Nakahara received the 8th IEEE/ACM MEMOCODE Design Contest 1st Place Award in 2010, the SASIMI Outstanding Paper Award in 2010, the IPSJ Yamashita SIG Research Award in 2011, the 11th FIT Funai Best Paper Award in 2012, the 7th IEEE MCSoC-13 Best Paper Award in 2013, and the ISMVL2013 Kenneth C. Smith Early Career Award in 2014. He was the Workshop Chairman for the ULSIWS from 2014 to 2017; as the Program Chairman for the HEART in 2017. In addition, due to his academic contributions, he was selected as the general chair of the FPT'23. In 2022, the National Institute for Science and Technology Policy (NISTEP) awarded him the title of "Nice Step Researchers 2022" for his outstanding contributions to the development of science, technology, and innovation.


Coffee Break(14:30-15:10)

Student Poster Session(15:10-16:10) Chair: Masanori Natsui(Tohoku University)
Elevator Pitch : around 2 minutes


No.	Title	Authors
1	Consideration of the Quality Factor in the Interface Circuit for Piezoelectric Energy Harvesting	Shu Osawa, Ryoichi Miyauchi and Akira Hyogo(Tokyo University of Science)
2	The Reverse Current Reduction Technique for Cross-Coupled Differential CMOS Rectifiers	Takaki Akao, Ryoichi Miyauchi and Akira Hyogo(Tokyo University of Science)
3	The Reduction Technique of Gate-Drain Transient Voltages in a Class-EF RF Power Amplifier Using a Self-Biasing Circuit	Shuntaro Omori, Tatsuji Matsuura, Ryoichi Miyauchi and Akira Hyogo(Tokyo University of Science)
4	Improvement of Voltage Conversion Efficiency by Using Bootstrap Capacitor in a Rectifier for Piezoelectric Energy Harvesting	Yusuke Kakinuma, Ryoichi Miyauchi and Akira Hyogo(Tokyo University of Science)
5	A Robustness Technique for a Sudden Changing Input Signal in Zoom ADC by Using Switched-Capacitor Delay Circuit	Natsuki Kabasawa, Tatsuji Matsuura, Ryoichi Miyauti and Akira Hyogo(Tokyo University of Science)
6	Improvement Methods of the Start-up Response Time in an Ultra-Low Voltage Input Charge-Pump Boost Converter for RF Energy Harvesting	Arisa Shimizu, Ryoichi Miyauchi, Tatsuji Matuura and Akira Hyogo(Tokyo University of Science)
7	A Reference Voltage Correction Method for Gain Error Compensation in a 12-bit Two-Stage Pipelined SAR ADC	Shotaro Sugiyama, Tatsuji Matsuura, Ryoichi Miyauchi and Akira Hyogo(Tokyo University of Science)
8	Research of a Third-Order Error-Feedback Noise-Shaping SAR ADC	Yuya Shimmyo, Tatsuji Matsuura, Ryoichi Miyauchi and Akira Hyogo(Tokyo University of Science)
9	Optimizations in Quantum Processor Circuitry and Error Correction	Ali Therrien-Motamedi and Zeljko Zilic(Mcgill University, Department of Electrical, Computer and Software Engineering)
10	Security Evaluation of Post-Quantum KEM Implementation with Masking Countermeasure	Hibiki Ishikawa( Tohoku University), Akira Ito(NTT), Rei Ueno(Kyoto University Japan,Tohoku University) and Naofumi Homma( Tohoku University)
11	An Efficient Learning Method for Deep Learning-Based Side-Channel Analysis	Tomone Kajikawa( Tohoku University), Akira Ito(NTT), Rei Ueno(Kyoto University, Tohoku University) and Naofumi Homma( Tohoku University Japan)


Poster Session (at the Welcome Reception venue, ISMVL2025)(17:00-18:00)

Registration

• Registration fee is free.
• All participants require advance registration.
• The registration form is here.

Workshop Venue

• The ULSI Workshp will take place at a classroom on the campus of McGill University.
  Room 267, Macdonald Engineering Building, 817 Sherbrooke St W, Montreal, Quebec, H3A 0C3.
  

Call for Papers and Sessions

You are invited to submit an original paper, survey or tutorial paper on any subject in the area of new devices for ULSI systems, high-performance circuits and design, and new LSI architecture. The topics of interest include but not limited to:

Algebra and Formal Aspects ATPG and SAT Automatic Reasoning Bio-Inspired and Novel Hardware Algorithms Communication Systems Computer Arithmetic Computer Security Data Bases Data Mining Decision Diagram

Fuzzy Logic and Soft Computing Image Processing Logic Design and Switching Theory Logic Programming Machine Learning and Robotics Mathematical Fuzzy Logic Medical and Wellness Care Technology Nano Technology and Computer Security Opto-Electronics Index Generation Functions

Quantum Computing Quantum Cryptography Quantum Devices Signal Processing Single Electrons Spectral Techniques Superconductivity Web Intelligence Verification Philosophical Aspects

Proposals for special sessions concerning the above topics are also welcome. Special session proposals should be submitted to yiijima{at}oyama.kosen-ac.jp.

Submission Guidelines

Please submit one-page abstract with double-spaced single column format according to the following instruction:

Paper Format

1. We recommend you use the format below to prepare your manuscript.
   MS Word template file for one-page abstract
   
2. Please convert the manuscript file into a PDF file. All fonts used in the manuscript must be embedded in the PDF file in converting.
3. Please send the PDF file via e-mail to yiijima{at}oyama.kosen-ac.jp.

If you would like to submit your paper to the Student Poster Session, please send the e-mail with a subject of "Student Poster Session at ULSIWS2025" to yiijima{at}oyama.kosen-ac.jp. Otherwise, we will handle your paper as submission to Regular Sessions.

Presentation Style

Regular Sessions

• [Time] 15-minute presentation followed by 3-minute discussion

Student Poster Session

• [Time for Speech] Presentation (Elevator Pitch) : around 2 minutes
• [Time for Poster Presentation] Free discussion (Questions and Answers) : 60 minutes
  The poster Presentation will be held during the welcome reception at ISMVL2025.
• [Poster size] A0(841mm x 1189mm) or A1(594mm x 841mm) size

Committee

The ULSIWS2025 is organized by following members. If you have questions, do not hesitate to contact us. Best way to reach us is via mail.

Workshop Chairs:

• Yosuke Iijima (National Institute of Technology (KOSEN), Oyama College, Japan), yiijima{at}oyama.kosen-ac.jp

Sponsored by

• Japan Research Group on Multiple-Valued Logic
  

This workshop is an event presented on annual basis since 1992 by the IEEE Technical Committee on Multiple-Valued Logic.

Link

• The 55th International Symposium on Multiple-Valued Logic (ISMVL2025)
• Past Workshops
  • ULSIWS2024 [Brno, Czech Republic]
  • ULSIWS2023 [Shimane, Japan]
  • ULSIWS2022 [Fully Virtual]
  • ULSIWS2021 [Fully Virtual]
  • ULSIWS2020 [Miyazaki, Japan]
  • ULSIWS2019 [Fredericton, Canada]
  • ULSIWS2018 [Linz, Austria]
  • ULSIWS2017 [Novi Sad, Serbia]
  • ULSIWS2016 [Hokkaido,Japan]
  • ULSIWS2015 [Waterloo,Canada]
  • ULSIWS2014 [Bremen,Germany]
  • ULSIWS2013 [Toyama,Japan]
  • ULSIWS2012 [Victoria,Canada]
  • ULSIWS2011 [Tuusula,Finland]
  • ULSIWS2010 [Barcelona,Spain]
  • ULSIWS2009 [Okinawa,Japan]
  • ULSIWS2008 [Texas,U.S.A.]
  • ULSIWS2007 [Oslo,Norway]
  • ULSIWS2006 [Singapore,Singapore]
  • ULSIWS2005 [Calgary,Canada]
  • ULSIWS2004 [Toronto,Canada]